A via is an electrical connection between wiring structures (e.g., wiring layers) in a physical electronic circuit that goes through the plane of one or more adjacent layers. For example, in integrated circuit design, a via is a small opening in an insulating oxide layer that allows a conductive connection between different wiring layers. A via connecting the lowest layer of metal to diffusion or poly is typically called a “contact”.
In via technology, a skip via can be formed through many insulator layers, e.g., bypassing one or more wiring structures within the insulator layers, to connect with a lower wiring structure. This provides improved resistance characteristics, minimizes capacitance for a lower wiring structure, e.g., at M0 layer, as well as provides area efficiencies in the chip manufacturing process.
There are many challenges to using via and skip via structures. For example, during the etching processes, the dielectric materials surrounding the via and skip via structures can be damaged. This damage causes higher resistivity which, in turn, decreases device performance. More specifically, the patterning of skip via structures uses an organic planar layer (OPL) as a mask to create the skip via by drilling down from an upper metal layer, e.g., (M2), to a lower metal layer, e.g., (M0), in sequential reactive ion etching (RIE) processes. The RIE and an oxygen ashing process used to remove the OPL damage the dielectric materials e.g., ULK, surrounding the via and skip via structures, resulting in an undercut, necking in the via profile or voids in the skip via fill, amongst other issues.